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Si570/Si571
3.2. I 2 C Interface
The control interface to the Si570 is an I 2 C-compatible 2-wire bus for bidirectional communication. The bus
consists of a bidirectional serial data line (SDA) and a serial clock input (SCL). Both lines must be connected to the
positive supply via an external pullup. Fast mode operation is supported for transfer rates up to 400 kbps as
specified in the I 2 C-Bus Specification standard.
Figure 5 shows the command format for both read and write access. Data is always sent MSB. Data length is 1
byte. Read and write commands support 1 or more data bytes as illustrated. The master must send a Not
Acknowledge and a Stop after the last read data byte to terminate the read command. The timing specifications
and timing diagram for the I 2 C bus can be found in the I 2 C-Bus Specification standard (fast mode operation). The
device I 2 C address is specified in the part number.
S Slave Address
0
A Byte Address A
Data
A
Data
A
P
Write Command
(Optional 2 nd data byte and acknowledge illustrated)
S Slave Address
0
A Byte Address A
S
Slave Address 1
A
Data
A
Data
N
P
Read Command
(Optional data byte and acknowledge before the last data byte and not acknowledge illustrated)
From master to slave
From slave to master
A – Acknowledge (SDA LOW)
N – Not Acknowledge (SDA HIGH).
Required after the last data byte to signal the end of the read comand to the slave.
S – START condition
P – STOP condition
Figure 5. I 2 C Command Format
Rev. 1.4
17
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